Low Power Interconnect Design

Autori

• Sandeep Saini

Parametri

• 172 pagine
• 7 ore di lettura

• Computer, IT, programmazione
• Ingegneria elettrica
• Tecnologia e Ingegneria

Maggiori informazioni sul libro

Focusing on the challenges of signal delay and power consumption in on-chip interconnects and buses, this book presents practical solutions to mitigate these issues. It delves into the causes of delays and glitches, offering comprehensive insights into effective strategies for reducing both delay and power usage, making it a valuable resource for engineers and researchers in the field.

Lingua: Inglese

Pubblicato: 2016

(In brossura)