Introduction to Place and Route Design in VLSIs

Autori

• Patrick Lee

Parametri

• 236 pagine
• 9 ore di lettura

• Tecnologia e Ingegneria

Maggiori informazioni sul libro

The book covers essential topics in chip design, structured into seven comprehensive chapters. It delves into physical design flow, timing constraints, and place and route concepts, along with insights into tool vendors and process constraints. Key areas such as timing closure, methodology, ECO, spare gates, and formal verification are also addressed. Additionally, it explores coupling noise and strategies for chip optimization and tapeout, making it a valuable resource for understanding the intricacies of modern chip design.

Lingua: Inglese

Pubblicato: 2007

(In brossura)