Design for Testability, Debug and Reliability

Next Generation Measures Using Formal Techniques

Autori

• Sebastian Huhn
• Rolf Drechsler

Parametri

Pagine

188pagine

Tempo di lettura

7ore

• Computer, IT, programmazione

Maggiori informazioni sul libro

Focusing on the advancement of integrated circuits, this book presents innovative strategies for enhancing design testability, debugging, and reliability, particularly in safety-critical environments. It explores formal techniques like the Satisfiability (SAT) problem and Bounded Model Checking (BMC) to tackle challenges related to increasing test data volume and application time. Detailed evaluations of these methods are provided, alongside industry-relevant benchmarks, all within a unified framework that supports standardized software and hardware interfaces.

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Lingua: Inglese

Pubblicato: 2021

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